In recent years, power consumption has become a key design metric for integrated circuit designs. Circuit designers need to be able to accurately estimate the power consumption of a circuit design in its early stages so that optimizations can be made before significant resources are spent refining the design. However, accurate power models are usually only available for basic circuit components, called standard cells, which are used at lower levels of abstraction and not at levels of abstraction at which circuits are generally designed. Connecting power models of standard cells to designs at higher levels of abstraction is a process called cell selection, and the cell selection process may be difficult due to the numerous possibilities for implementing complex logic functions.